Digital computing and catastrophic failures

I just read a wonderful article on Discover magazine. The article centers around Kwabena Boahen (and other members of the school of Carver Mead) in creating electronic circuitry modeled more after the human brain. The main claim is that these types of neurocircuits have the potential in significantly lowering the power consumption for computing. If the claim were correct, though, it will imply there are certain nontrivial relationship between the voltage applied to a transistor and the noise experienced.

The idea, I think, if I understood correctly just from the lay explanation, is a trade-off between error rates versus power. Let us consider the completely simplified and idealized model given by the following. A signal is sent in at voltage V_0. The line introduces thermal noise in the form of a Gaussian distribution. So the signal that comes out at the other end has a distribution \phi_{1,V_0}(V), where the Gaussian family \phi_{\sigma,\mu} is defined as

Definition 1 (Noisy signal)
\displaystyle \phi_{\sigma,\mu}(x) = \frac{1}{\sqrt{2\pi \sigma^2}} e^{-(\frac{x}{\sigma} - \sigma\mu)^2}

(Note: our definition is not the standard definition, in particular our Gaussian is centered at \sigma^2\mu! This definition makes calculations later simpler, as we shall see.) Read the rest of this entry »